Conference program
Monday,
May 21
19.00
- 21.00 - WELCOME
RECEPTION
Tuesday,
May 22
8.45
– 9.00 - Opening addresses
9.00-10.00
Session
Chair: E. Orlowska
Algebras for Hazard Detection
10.00
– 10.30 – COFFEE BREAK
10.30
-12.00
Session Chair: H. Sawada
10.30 - 11.00 - A New Improved
Cost-Table-Based Technique for Synthesis of 4-Valued Unary Functions Implemented
Using
Current-Mode CMOS Circuits
11.00 – 11.30 - Dual-Rail Multiple-Valued Current-Mode VLSI with Biasing Current Sources
11.30 – 12.00 - Realization of NMAX and NMIN Functions with Multi-Valued Voltage Comparators
M. Inaba, K. Tanno, and O. Ishizuka
10.30
-12.00
10.30 – 11.00 - An Application of Multiple-Valued Logic to Test Case Generation for Software System Functional Testing
11.00 – 11.30 - Spectral Techniques in Binary and Multiple-Valued Switching Theory
M. Karpovsky, R. Stanković, and C. Moraga
12.00
– 14.00 - LUNCH
Symposium Committee
Meeting
14.00
- 15.00
Session Chair: T. Hanyu
Tunnelling Diode Technology
W. Prost, U. Auer, F.-J. Tegude, C. Pacha, K. Goser, R. Duschl, K.
Eberl, and O. Schmidt
15.00
- 16.00
Session Chair: T. Waho
15.00 – 15.30 - Power Efficient Inter-Module Communication for Digit-Serial DSP Architectures in Deep-Submicron Technology
I. Ben Dhaou, E.
Dubrova, and H. Tenhunen
15.30 – 16.00 - A 4-Digit CMOS Quaternary to Analog Converter with Current Switch and Neuron MOS Down Literal Circuit
S. Han, Y. Choi, and H. Kim
15.00
- 16.00
15.00 – 15.30 - On Complete Residuated Many-Valued Logics with T-Norm Conjunction
F. Esteva and L. Godo (COST 15)
15.30 – 16.00 - On Some Classes of Fuzzy Information Relations
Radzikowska and
E. Kerre (COST 15)
16.00
– 16.30 – COFFEE BREAK
16.30
- 18.00
Session Chair: W. Prost
16.30 – 17.00 - A Three-Valued D-Flip-Flop and Shift Register Using Multiple-Junction Surface Tunnel Transistors
T. Uemura and T. Baba
17.00 – 17.30 - Flash Analog-to-Digital Converter Using Resonant-Tunneling Multiple-Valued Circuits
T. Waho, K. Hattori, and Y. Takamatsu
17.30 – 18.00 - The Use of Arithmetic Operators in a Self-Restored Current-Mode CMOS Multiple-Valued Logic Design Architecture
H. Teng and R. Bolton
16.30
– 17.30 - Session 5b: Fuzzy logics and their
applications II
Session
Chair: E. Kerre
16.30 – 17.00 - Evaluation of Inconsistency in a 2-Way Fuzzy Adaptive System Using Shadowed Sets
E. Gürkan, A. Erkmen, and I. Erkmen (COST
15)
17.00 – 17.30 - Identification of Incompletely Specified Fuzzy Unate Logic Function
H. Kikuchi
Wednesday,
May 23
9.00
-10.00
Session Chair: W. McCaull
Representation Theorems and the Semantics of (Semi)Lattice-Based Logics
Viorica Sofronie-Stokkermans
10.00
– 10.30 – COFFEE BREAK
10.30
-12.00
Session Chair: A. Szalas
10.30 – 11.00 - Multiple-Valued Galois Field S/D Trees for GFSOP Minimization and Their Complexity
A. Al-Rabadi and M. Perkowski
11.00 – 11.30 - Multiple-Valued Mask-Programmable Logic Array Using One-Transistor Universal-Literal Circuits
T. Hanyu, M. Kameyama, K. Shimabukuro, and C.
Zukeran
11.30 – 12.00 - Decomposition of Multi-Valued Functions into Min- and Max-Gates
C. Lang and B.
Steinbach
10.30
– 12.00 - Session 7b: Automated reasoning and
complexity I
10.30 – 11.00 – Cut-Elimination in a Sequents-of-Relations Calculus for Gödel Logic
M.
Baaz, A. Ciabattoni, and C. Fermüller (COST 15)
11.00 – 11.30 - Model Checking with Multi-Valued Temporal Logics
M. Chechik, S. Easterbrook, and B. Devereux
11.30 – 12.00 - Automated Reasoning with Ordinary Assertions and Default Assumptions
D. Van Heule and A. Hoogewijs
12.00
– 14.00 - LUNCH
Symposium Subcommittee Meeting
14.00-15.00
Session Chair: D. Simovici
Exploiting Polarity in Multiple-Valued Inference Systems
Z.
Stachniak
15.00-16.00
Session
Chair: C. Fermueller
Complexity
of Many-Valued Logics
R. Haehnle
16.00
– 16.30 – COFFEE BREAK
16.30-18.00
Session Chair: Z. Stachniak
16.30 – 17.00 - Information Theory Method for Flexible Network Synthesis
17.00 – 17.30 - Compact SOP Representations for Multiple-Output Functions: An Encoding Method Using Multiple-Valued Logic
T. Sasao
17.30 – 18.00 - Two-Stage Exact Detection of Symmetrics
A.
Tomaszewska, P. Dziurzański, S. Yanushkevich, and V.
Shmerko
16.30
– 18.00 - Session 10b: Automated reasoning and
complexity II
16.30 – 17.00 - A Modular Reduction of Regular Logic to Classical Logic
R. Béjar, R. Hähnle, and F. Manyà
17.00 – 17.30 - Hypersequents as a Uniform Framework for Urquhart’s C, MTL and Related Logics
A. Ciabattoni and C. Fermüller (COST 15)
17.30 – 18.00 - Polynomial-Time Algorithms for Verification of Some Properties of k-Valued Functions Represented by Polynomials
S. Selezneva
20.00
- 23.00 - CONFERENCE
DINNER
Thursday,
May 24
9.00
-10.00
Session Chair: M. Perkowski
Challenge of a Multiple-Valued Technology in Recent Deep-Submicron VLSI
T. Hanyu
10.00
– 10.30 – COFFEE BREAK
10.30-12.00
10.30 – 11.00 - A Model of Reaction-Diffusion Cellular Automata for Massively Parallel Molecular Computing
M. Hiratsuka, T. Aoki, and T. Higuchi
11.00 – 11.30 - Synthesis of Multiple-Valued Arithmetic Circuits Using Evolutionary Graph Generation
M. Natsui, T. Aoki, and T. Higuchi
11.30 – 12.00 - An Axiomatization of Generalized Entropy of Partitions
D. Simovici and S.
Jaroszewicz
10.30-12.30
10.30 – 11.00 - Many Valued Paraconsistent Logic
C. Morgan
11.00 – 11.30 - On Logical Fiberings and Decomposition of Many-Valued Operations: A Brief Survey
J. Pfalzgraf (COST 15)
11.30 – 12.00 - Relations between Clones and Full Monoids
H. Machida, M. Miyakawa, and I. Rosenberg
12.00
– 13.30 - LUNCH
13.30-14.30
Session Chair: M.
Fitting
Classical Gentzen-Type Methods in Propositional Many-Valued Logics
A. Avron
14.30
- 16.00
Session Chair: M.
Miyakawa
14.30 – 15.00 - Selection of Efficient Re-Ordering Heuristics for MDD Construction
F. Schmiedle, W.
Günther, and R. Drechsler
15.00 – 15.30 - Bit-Level and Word-Level Polynomial Expressions for Functions in Fibonacci Interconnection Topologies
R. Stanković, M. Stanković, J. Astola, and K.
Egiazarian
15.30 – 16.00 - Design of Haar Wavelet Transforms and Haar Spectral Transform Decision Diagrams for Multiple-Valued Functions
R. Stanković, M.
Stanković, and C. Moraga
14.30
– 16.00 - Session 14b: Fuzzy logics and set
theories
14.30 – 15.00 - On a Kleenean Extension of Fuzzy Measure
T. Araki, M. Mukaidono, and
F. Yamamoto
15.00 – 15.30 - A Set Theory within Fuzzy Logic
P. Hájek and Z. Haniková (COST 15)
15.30 – 16.00 - On axiomatic characterisations of fuzzy approximation operators II. The rough fuzzy set based case.
H. Thiele (COST 15)
16.00
– 16.30 – COFFEE BREAK
16.30-18.00
16.30 – 17.00 - A Functional Manipulation for Improving Tolerance against Multiple-Valued Weight Faults of Feedforward Neural Networks
N. Kamiura, Y. Taniguchi, and N. Matsui
17.00 – 17.30 - Logics Circuit Diagnosis by Using Neural Networks
H. Tatsumi, Y. Murai, and S. Tokumasu
17.30 – 18.00 - The Designing and Training of a Fuzzy Neural Hamming Classifier
Q. Hua and Q-L. Zhen
16.30-18.00
Session Chair: C. Morgan
16.30 – 17.00 - Weierstrass Approximations by Łukasiewicz Formulas with One Quantified Variable
S. Aguzzoli and D. Mundici (COST 15)
17.00 – 17.30 - Composing Submonads
P. Eklund, M. Galán, J. Medina, M. Ojeda-Aciego, and A. Valverde (COST
15)
17.30 – 18.00 - A Method of Uncertainty Reasoning by Using Information
J. Ma, J. Liu, and Y.
Xu
18.00 – 19.00 - Plenary session