Day |
Morning |
Afternoon |
||
ULSIWS May 18 Escalus Room, McEwan Hall |
On-site
Registration ULSI Workshop (10:30 ~16:30, Coffee Break 14:40-15:00) 18:00 ~ 20:00 Reception at the Den, MacEwan Hall | |||
ISMVL May 19 Rozsa Centre |
Opening
address (9:00-9:10) Session 1. Invited Talk (9:10-10:00) (B. Sanders) Coffee break (10:00 - 10:10) |
(10:10-12:00) Session 2A Algebra I Session 2B Circuits I <!--[endif]-->Lunch (12:00 - 13:30) |
(13:30-14:20) Session 3. Tutorial on Clones (L. Haddad) (14:20-16:00) Session 4A Logic Design Session 4B Clones and algebraic aspects |
Coffee break
(16:00 - 16:20) (16:20-18:00) Session 5A Circuits II Session 5B Fuzzy Logic and neural networks |
ISVML May 20 Rozsa Centre |
Session 6.
Invited Talk (9:10-10:00) (M. Frank) Coffee break (10:00 - 10:20) |
(10:20-12:00) Session 7A Spectral Transforms Session 7B Algebra II Lunch (12:00 - 13:30) |
Bus trip to Banff and Banquet at Banff
(13:30 ~
22:00) |
|
ISMVL May 21 Rozsa Centre |
Plenary Session
(9:00-9:20) Session 8 Invited Address (9:20-10:10) (M. Perkowski) Coffee break (10:10 - 10:30) |
(10:30-12:10) Session 9A Logic Design II Session 9B Algebra III Closing |
May 19, Rozsa Centre, Morning
Rozsa Centre
9:00-9:10 Opening address
9:10-10:00
Session 1 Keynote Address Chair G. Dueck
Quantum Fingerprinting
B. Sanders
10:00-10:20 Coffee
Break
10:10-12:00 Sessions 2A and 2B
Session 2A
Algebra I Chair W.
Carnielli
An Abstract
Axiomatization of the Notion of Entropy
I. Rosenberg, D. Simovici
On
Prior’s Three-Valued Modal Logic Q
S. Akama, Y. Nagata
Polynomial
Ring Calculus for Many-valued Logics
W. Carnielli
Partially ordered
set with residuated t-norm
M. Kondo, M. Kawaguchi
Session
2B Circuits I Chair T.
Aoki
A
Two-Bit-per-Cell Content-Addressable Memory Using Single-Electron Transistors
K. Degawa, T. Aoki, T. Higuchi, H. Inokawa and Y. Takahashi
Multi-valued DNA-based electronic nanodevices
M. Lyshevski
A
design of 10 GHz Delta-Sigma modulator using a 4-level differential
resonant-tunneling quantizer
K. Eguchi, M. Chibashi and T. Waho
Multi-Valued Nanoelectronics With Fullerenes
S. Lyshevski
A
Novel Ternary Switching Element Using CMOS Recharge Semi Floating-Gate Devices
<!--[if !supportLineBreakNewLine]-->H. Gundersen, R.
Jensen and Y. Berg
<!--[if
!supportLineBreakNewLine]-->
12:00-13:30
Lunch (at Den, MacEwan Hall)
May 19, Afternoon
Rozsa Centre
13:30-14:20
Session 3 Tutorial on Clones Chair M.
Perkowski
L.
Haddad
14:20-16:00 Sessions 4A and 4B
Session 4A Logic Design
I Chair T. Sasao
Test
generation and fault localization for quantum circuits
M. Perkowski, J.
Biamonte, M. Lukac
Multiple-Valued Logic Approach for a Systolic AB2
Circuit in Galois Field
N.l Abu-Khader, P. Siy
<!--[if
!supportLineBreakNewLine]-->
<!--[endif]-->
16:20-18:00
Sessions 5A and 5B
Session 5A Circuits
II Chair Y.
Iguchi
Multiple-Valued
VLSI Architecture for Intra-Chip Packet Data Transfer
T. Hasegawa, Y. Homma
and M. Kameyama
Implementation and evaluation of a fine-grain
multiple-valued field programmable VLSI based on source coupled logic
M.M.
Haque, T. Hasegawa, M. Kameyama
Multiple-Valued Caches for
Power-Efficient Embedded Systems
E. Özer, R. Sendag and D. Gregg
Analog Soft Decoding for Multi-level Memories
C. Winstead
Multiple-Valued Duplex Asynchronous Data Transfer Scheme for
Interleaving in LDPC Decoders
N. Onizawa, A. Mochizuki, T. Hanyu and V. C.
Gaudet
Signed Digit CMOS (SD-CMOS) Logic Circuits with dynamic operation
H. Fukuda
<!--[if
!supportLineBreakNewLine]-->Session 5B Fuzzy Logic
and neural networks Chair C.
Moraga
The Alleged
Limitations of Fuzzy Control
Ph. Serchuk
A new aspect for the
optimization of fuzzy if-then rules
C. Moraga, R. Salas
May 20, Morning
Rozsa
Centre
9:10-10:00 Session 6 Invited Address Chair
J.Muzio
Approaching the Physical Limits of Computing
M. Frank
<!--[if
!supportLineBreakNewLine]-->
<!--[endif]-->
12:00-13:30 - Lunch at
Den, MacEwan Hall
May 20, Aftenoon - trip to Banff and Dinner at
Banff
May 21, Morning
9:00 - 9:20 Plenary Session (TC Committee report,
presentation of ISMVL2006)
9:20 - 10:10 Session 8 Invited Address Chair
B. Falkowski
Hahoe KAIST Robot Theatre: learning rules of
interactive robot behavior as a multiple-valued logic synthesis problem
M.
Perkowski, T. Sasao, J.H. Kim, M. Lukac, J. Allen, and S. Gebauer
10:10 - 10:30 Coffee
Break
10:30-12:10 Sessions 9A and 9B
Session 9A
Logic Design II Chair J.
Muzio
Controlling the Memory During Manipulation
of Word-Level Decision Diagrams
S. Kinder, G. Fey, R. Drechsler
Radix Converters: Complexity and Implementation by LUT Cascades
T.
Sasao
Dynamic reliability analysis of the k-out-of-n multi-state system
E. Zaitseva, V. Levashenko
Antisymmetries in the Representation of
Boolean and Multi-Valued Functions
J. Rice, J. Muzio
Comparison of
multiple-valued logic circuits performance using statistical approach
D.H.Y.
Teng, R.J. Bolton
Session 9B Algebra III Chair H.
Machida
Normal Forms for the One–Variable
Fragment of Hajek’s Basic Logic
S. Aguzzoli and B. Gerla
<!--[if
!supportLineBreakNewLine]--><!--[endif]-->
Closing
by S. Yanushkevich mailto:grant@icu.ac.jp, ISMVL-2005 Chair