May 23, Monday - ISMVL 2011 - Morning

8:30

Registration

9:00

Invited Talk (Chair J. Astola)
Index Generation Functions: Recent Developments
Tsutomu Sasao, (Kyushu Institute of Technology, Japan) [Auditorium]

1A Logic Design and Switching Theory
(Chair T. Soma) [Auditorium]

1B Computer Arithmetic
(Chair M. Kameyama) [CR2]

10:00

Autosymmetric Multiple-Valued Functions: Theory and Spectral Characterization
A. Bernasconi, (Università di Pisa, Italy)
V. Ciriani, (Università degli Studi di Milano, Italy)

Designing a RISC CPU in Reversible Logic
R. Wille, M. Soeken, D. Große E. Schönborn,
R. Drechsler, (University of Bremen, Germany)

10:25

Numeric Function Generators Using Piecewise Arithmetic Expressions
S. Nagayama, (Hiroshima City University, Japan)
T. Sasao, (Kyushu Institute of Technology, Japan)
J. T. Butler, (Naval Postgraduate School, USA)

A Graph-Based Approach to Designing Multiple-Valued Arithmetic Algorithms
K. Saito, N. Homma, T. Aoki, (Tohoku University, Japan)

10:50

Coffee break

2A Logic Design and Switching Theory
(Chair A. Bernasconi) [Auditorium]

2B Computer Arithmetic
(Chair N. Homma) [CR2]

11:20

Classification of Ternary Logic Functions by Self-Dual Equivalence Classes
T. Soma, (Tokyo, Japan) T. Soma, (Illinois College, USA)

A Three-Valued Approach to the Master Argument
S. Akama(C-Republic, Japan), Y. Nagata (University of the Ryukyus, Japan)

11:45

Error-Correcting Decision Diagrams for Multiple-Valued Functions
H. Astola, S. Stanković, J. Astola (Tampere University of Technology, Finland)

Some Types of Filters in Hoops
M. Kondo (Denki University, Japan)

3A Spectral Transforms
(Chair D. M. Miller) [Auditorium]

3B Philosophical Aspects / Mathematical Fuzzy Logic (Chair F. Manya) [CR2]

12:10

Multiple-Valued Logic Networks with Regular Structure Obtained from Fast Fourier Transforms on Finite Groups
R. S. Stanković, (University of, Niš, Serbia)
J. Astola, (Tampere University of Technology, Finland)
C. Moraga, (EU Centre for Soft Computing, Spain)

Weak Uniform Based Logic and its Filter Theory
M. Kondo, (Denki University, Japan), M. Kawaguchi,
M. Miyakoshi, (Hokkaido University, Japan), O. Watari, (Hokkaido Automotive Engineering College, Japan)

12:35

Representation of Multiple-valued Bent Functions Using Vilenkin-Chrestenson Decision Diagrams
S. Stanković, J. Astola, (Tampere University of Technology, Finland), M. Stanković, (University of Niš, Serbia)

Notes on the Exclusive Disjunction
I. García-Honrado, E. Trillas, (EU Centre for Soft Computing, Spain)

13:00

Lunch- Meeting of Technical Committee and Executive Committee

May 23, Monday - ISMVL 2011 - Afternoon

14:20

Tutorial Talk (Chair M. Perkowski) - From Truth Tables to Programming Languages
Progress in the Design of Reversible Circuits
R. Drechsler, R. Wille, University of Bremen, Germany[Auditorium]

4A Logic Design and Switching Theory
(Chair R. Drechsler) [Auditorium]

4B Circuit/Device Implementation
(Chair T. Waho) [CR2]

15:00

Two-Qubit Quantum Gates to Reduce the Quantum Cost of Reversible Circuit
M. Rahman1, A. Banerjee2, G. Dueck1, (University of New Brunswick, Canada1), A. Pathak, (Jaypee Institute of Information Technology, India2)

Design of a Low-Energy Nonvolatile Fully-Parallel Ternary CAM Using a Two-Level Segmented Match-Line Scheme
S. Matsunaga, A. Katsumata, M. Natsui, T. Hanyu, (Tohoku University, Japan)

15:25

Fault Tolerant Computing Paradigm for Random Molecular Phenomena: Hopfield Gates and Logic Networks
A. H. Tran, S. Yanushkevich, S. Lyshevski, V. Shmerko, (University of Calgary, Canada)

An Error-Correcting Method for Binary and Multiple-Valued Logic
C. Winstead, Y. Luo, E. Monzon, A. Tejeda, (Utah State University, USA)

15:50

Coffee break

5A Logic Design and Switching Theory
(Chair M. A. Thornton) [Auditorium]

5B Circuit/Device Implementation
(Chair Y. Yuminaka) [CR2]

16:10

Mapping Decision Diagrams for Multiple-Valued Logic Functions into Threshold Logic Networks
M. Stanković, S. Stojković, (University o, Niš, Serbia)
C. Moraga, (EU Centre for Soft Computing, Spain)

A Comparison of Heterogeneous Multi-valued Decision Diagram Machines for Multiple-output Logic Functions
H. Nakahara, T. Sasao, M. Matsuura, (Kyushu Institute of Technology, Japan)

16:35

Determining Minimized Galois Field Expressions for Ternary Functions
R. S. Stanković, (University of Niš, Serbia)
H. Astola, J. Astola,(Tampere University of Technology, Finland)

Information-Preserving Logic Based on Logical Reversibility to Reduce the Memory Data Transfer Bottleneck and Heat Dissipation
M. Lukac, B. Shuai, M. Kameyama, (Tohoku University, Sendai, Japan), D. M. Miller, (University of Victoria, Canada)

18:00

Dinner

19:00

Panel session: Low Power Circuits Based on MVL
(Moderators: T. Hanyu and M. Natsui)

Opening Remarks
M. Natsui and T. Hanyu (Tohoku Univ., Japan)

High-performance ADC using Multiple-valued Logic
T. Waho (Sophia University., Japan)

Multiple-valued FPGA
Z. Zilic (University. of McGill, Canada)

Multiple-valued Asynchronous Data Transmission and Its Applications
V. Gaudet (University. of Waterloo, Canada)

20:00

Multiple-valued Reconfigurable LSI
M. Kameyama (Tohoku University, Japan)

May 24, Tuesday - ISMVL 2011 - Morning

8:30

Registration

9:00

Invited Talk (Chair R. S. Stankovć) - Answer Set Programming: A Declarative Approach to Solving Challenging Search Problems
Ilkka Niemelä, Aalto (University, Finland) [Auditorium]

6A Quantum Circuits
(Chair G. Dueck) [Auditorium]

6B Algebra and Formal Aspects
(Chair M. Couceiro) [CR2]

10:00

Some Basic Ternary Operations Using Toffoli Gates along with the Cost of Implementation
A. Biswas, S. Chowdhury, Md. M. M. Khan, M. Hasan (University of Engineering and Technology, Bangladesh), A. I. Khan, (University of California at Berkeley, USA)

Maximal Centralizing Monoids and Their Relation to Minimal Clones
H. Machida, (International Christian University, Japan)
I. Rosenberg, (Université de Montréal, Canada)

10:25

Rev-Map: A Direct Gateway from Classical Irreversible Network to Reversible Network
S. Sultana, K. Radecka, (McGill University, Canada)

Maximal Hyperclones Determined by Monotone Operations
J. Čolić1, H.Machida, (International Christian University, Japan) J. Pantović1, (University of Novi Sad, Serbia1)

10:50

Coffee break

7A Quantum Circuits
(Chair M. Lukac) [Auditorium]

7B Algebra and Formal Aspects
(Chair J. Pantović) [CR2]

11:20

On the Skipped Variables of Quantum Multiple-valued Decision Diagrams
D. Feinstein, (Innoventons, Inc., USA)
M. A. Thornton, (Southern Methodist University, USA)

On Equational Definability of Function Classes
M. Couceiro, E. Lehtonen, (University of Luxembourg)
T. Waldhauser, (University of Szeged, Hungary)

11:45

Comparison of Influence of Two Data-encoding Methods for Grover Algorithm on Quantum Costs
S. Dhawan, M. Perkowski, (Portland State University, USA)

Galois Theory for Partial Clones and Some Relational Clones
K. Schölzel, (Universität Rostock, Germany)

12:10

Review Talk
(Chair T. Sasao)

[Auditorium]

On the Contributions of Arto Salomaa to Multiple-Valued Logic
R. S. Stanković, (University of Niš, Serbia)
J. T. Astola, (Tampere University of Technology, Finland)

13:00

Lunch – Meeting of Symposium Committee

May 24, Tuesday - ISMVL 2011- Afternoon

14:20

Tutorial Talk (Chair D. Simovici)
Invitation to Clone Theory with Partial Clones and Hyperclones
H. Machida, (International Christian University, Japan) L. Haddad, (Royal Military College of Canada), J. Pantović, (University of Novi Sad, Serbia)[Auditorium]

15:00

Plenary Session (Chair M. A. Thornton)[Auditorium]

Awards and Symposium Reports

Address of the President of the IEEE Multiple-valued Technical Committee
M. A. Thornton.
J. Astola, symposium report.
R. S. Stanković, program report

Awards for best papers
Announcements of candidates for hosting future ISMVL

15:40

Coffee break

16:00

Excursion to Ainola and Halosenniemi

16:15

Bus leaves from Gustavelund's main entrance

16:40

First stop is at Ainola, the home of the famous Finnish master composer Jean Sibelius. In Ainola we will have a guided tour through the home museum. Due to space limitations, the group will be split into two smaller groups and while a group is in the museum, the other explores the surrounding garden.

17:40

Continuation to Halosenniemi, the wilderness studio of the Finnish painter Pekka Halonen, which today functions an art museum. The guided tour will take about 30 minutes.

18.30

Return to Gustavelund

19:00

Conference banquet (Garden (weather providing) or Main restaurant hall in Gustavelund)

May 25, Wednesday - ISMVL 2011 - Morning

8:30

Registration

9:00

Invited Talk (Chair C. Moraga)
Towards a Formalization of Guessing
E. Trillas, (European Centre for Soft Computing, Spain) [Auditorium]

8A Quantum Circuits
(Chair P. Kerntopf)[Auditorium]

8B Communication Systems
(Chair Y. Berg) [CR2]

10:00

Synthesis Techniques for Ternary Quantum Logic
S. Mandal, A. K. Choudhury,(University of Calcutta, India), A. Chakrabarti, S. Sur-Kolay, (Indian Statistical Institute, India)

Extending Multiple-valued Clausal Forms with Linear Integer Arithmetic
C. Ansotegui, (UdL Lleida, Spain), M. Bofill, F. Manya , (IIIA–CSIC, Spain), M. Villaret, (Universitat de Girona, Spain)

10:25

Quantum Phase Estimation using Multi-Valued Logic
S. V. Parasa, M. Perkowski, (Portland State University, USA)

Complementary Multiple-valued Encoding Scheme for Interconnect-Fault-Resilient Bidirectional Asynchronous Links
A. Matsumoto, N. Onizawa, T. Hanyu, (Tohoku University, Japan)

10:50

Coffee break

9A Logic Design and Switching Theory
(Chair M. Stanković) [Auditorium]

9B Circuit/Device Implementation
(Chair Y. Iguchi) [CR2]

11:20

Synthesis of Reversible Synchronous Counters
M. Khan, (East West University, Bangladesh),
M. Perkowski,(Portland State University, USA)

Time-Domain Multi-bit ΔΣ Analog-to-Digital Converter
K. Kuribayashi, K. Machida, Y. Toyama, T. Waho, (Sophia University, Japan)

11:45

A Testable Realization for Decimal Multipliers
T. Hirayama, Y. Nishitani, (Iwate University, Japan),
S. Kitamura, (Hirosaki University, Japan)

Ultra-Low-Voltage and High-Speed CMOS Full Adder Using the Floating Gates and Multiple-Valued Logic
B. Yngvar, (Univesity of Oslo, Norway)

10A Logic Design and Switching Theory
(Chair S. N. Yanushkevich) [Auditorium]

10B Algebra and Formal Aspects
(Chair H. Machida)[CR2]

12:10

Using Multiple-Valued Logic Decision Diagrams to Model System Threat Probabilities
T. Manikas, M. Thornton, (Southern Methodist University, USA), D. Feinstein, (Innoventons, Inc., USA)

A Survey on the Arity Gap
M. Couceiro, E. Lehtonen, (University of Luxembourg),
T. Waldhauser, (University of Szeged, Hungary)

12:35

A Realization Method of Forward Converters from Multiple-Precision Binary Numbers to Residue Numbers with Arbitrary Mutable Modulus
K. Shirakawa, T. Uemura, I. Yukihiro, (Meiji University, Japan)

The Lattice of the Clones of Self-dual Functions in Three-valued Logic
Dmitriy Zhuk, (Moscow State University)

13:00

Lunch

May 25, Wednesday - ISMVL 2011 - Afternoon

14:20

Tutorial Talk (Chair B. Steinbach)

Multiple-Valued Logic over the field of Complex Numbers and Complex-Valued Neural Networks
I. Aizenberg, (Texas A&M University-Texarkana, USA)

Recognition of Blurred Images Using Multilayer Neural Networks Based on Multi-Valued Neurons
I. Aizenberg, S. Alexander, J. Jackson, (Texas A&M University-Texarkana, USA)[Auditorium]

15:00

Coffee break

11A Quantum Circuits
(Chair S. Nagayama) [Auditorium]

11B Algebra and Formal Aspects
(Chair E. Lehtonen) [CR2]

15:15

Elementary Quantum Gate Realizations for Multiple-control Toffoli Gates
D. M. Miller1, R. Wille, (University of Bremen, Germany), Z. Sasanian1, (University of Victoria, Canada1)

Entropies on Bounded Lattices
D. Simovici, (University of Massachusetts, USA)

15:40

Improved Complexity of Quantum Oracles for Ternary Grover Algorithm for Graph Coloring
Y. Wang, M. Perkowski, (Portland State University, USA)

On Composition-closed Classes of Boolean Functions
T. Waldhauser, (University of Szeged, Hungary)

16:05

Speed-up of Neuromorphic Adiabatic Quantum Computation by Local Adiabatic Evolution
M. Kinjo, K. Shimabukuro, (University of the Ryukyus, Japan)

Paradigms for Non-classical Substitutions
P. Eklund1, R. Helgesson1, (Umeå University Sweden),
M. Ángeles Galán, (University of Màlaga, Spain),
J. Kortelainen,( Mikkeli University of Applied Sciences, Finland)

16:30

Closing Session (Chair J. Astola) [Auditorium]

17:00

Dinner